|Name:||Towards I/O Analysis of HPC Systems & a Generic Architecture to Collect Access Patterns|
|Time:||Tuesday, June 19, 2012
2:15 PM - 2:45 PM
CCH - Congress Center Hamburg
|Speakers:||Marc C. Wiedemann, University of Hamburg|
|Abstract:||In high-performance computing (HPC) applications, a high-level I/O call will trigger activities on a multitude of hardware components such as massively parallel systems supported by huge storage systems and internal software layers. Currently, their complex interplay makes it impossible to identify the causes for and the locations of I/O bottlenecks. Existing tools allow us to identify the bottleneck but provide little guidance to identify the cause and how to improve the situation.
Our project Scalable I/O for Extreme Performance was initiated to find solutions for this problem. To achieve this goal in SIOX, we will build a system to record access information on all layers and components, recognize access patterns, and characterize the I/O system. Ultimately, it will localize the reasons for I/O bottlenecks and propose optimizations for the I/O middleware that improve I/O performance, such as throughput rate and latency. Furthermore, the SIOX system will support decision making while planning new I/O systems.
In this paper we introduce the SIOX system and present its current status: the intended approach to collect the required access information, an architectural concept, methods to reconstruct the I/O path and an excerpt of the interface for data collection. The focus lies on the architecture, which collects and combines the relevant access information along the I/O path, and the efficient transfer of this information. An abstract modeling approach allows us to reduce the complexity of the I/O activities on parallel computing systems, while an abstract interface allows us to adapt the SIOX system to various HPC file systems.