June 17-21, 2012

Hamburg, Germany

Contribution Details

Name: Architectures / Large Scale Simulations
(5) A Novel Many Core Simulator for Very Large Clusters Running Multiple Applications
Time: Monday, June 18, 2012
3:00 PM - 8:30 PM
Room:   Hall H, #911
CCH - Congress Center Hamburg
Speakers:   Prashanth Thinakaran, Waran Research Foundation
Abstract:   Advent of multi-core designs has paved way towards breaking the Exa-scale performance barrier and hence it is been a major focus for modern computer architecture research. It is evident that future generation super computers would have hundreds of Multi-core processors at the node level and proportionately a higher number at the cluster level too. These node architectures which are generally simulated for its correctness are scaled up to the cluster level. So, there arises a necessity to scale node level simulators to evaluate the metrics of cluster with the help of large scale simulation. Hence, a proactive paradigm shift from the conventional simulation techniques towards effective simulation of cluster level design and addressing its needs becomes inevitable. This articulates the need for developing an effective cluster level simulator that quantifies all the parameters that influences the cluster design in a cycle accurate manner and therefore we present a scalable simulator that couples a cycle-accurate node simulator with a generic supercomputer network model. At this context, there occurs a necessity towards simulating the node architecture consisting of functional units, network topology, memory hierarchy etc. with cycle accuracy because the coarse-grained simulators skew dramatically of the order 100x when these approximations are scaled up over hundreds of systems at the cluster level.  
  • Tutorial Pass
  • HPC in Asia Workshop Pass
  • Conference Pass
  • Conference Pass or Exhibition Pass
    Satellite Event marked with * requires separate pass
  • Morning & Afternoon Coffee Breaks
    Midday Lunch Break
Program may be subject to changes.